cst error

Hi,
I'm simulating simple antenna structures using CST. The antenna is kind of slot or some other shapes as well. Anyway, I'm getting two kind of errors, and I don't know exactly what they means? and why they appear? and how to overcome this problem.
1- Some PEC material is touching the boundry ! This may lead to inaccurate farfield results. Please check your structure.
I have copper not PEC. And it is touching the edge from the port side.
2- Some higher propagation modes at port 1 are not considered in time domain caculations. This possibly leads to an inaccurate energy balance. Consider to reduce port size or decrease the upper frequency limit.
Port size has nice dimensions and the port size as well.
Regards

hi,
1. making a metal touch the boundary may cause some errors in the farfield calculation, you better make the port inside the structure. if you don't have back lobe then just ignore the message.
2. this may happen in several cases
a. you have different polarizations for the same mode (e.g. TE11 in circulkar w.g.)
b. the wave guide is not operating in single mode over part of the frequency range you chose for time simulations.
hope this might help.
Best Regards,
Adel

Dear Adel,
Th.anks a lot for your reply.
1- Do you mean this problem from port size ?
My structure is single layer substrate with Er=3. The upper and lower metal is copper. I have slot feeded by CPW. The boundry conditions are all open, Zmin:open (add space), Zmax=open (add space).
CST gives "Parallel symmetry planes! No far field calculation possible"
Then, I tried to remove some metal from edges "top, left and right" from upper and lower metals. After that I've got the message "Some PEC material is touching the boundry ! This may lead to inaccurate farfield results. Please check your structure. "
So, where is the wrong?
2- My structure in this case is single layer substrate with Er=3. The upper metal is copper. I have slot feeded by CPW. The boundry conditions are all open, Zmin:Et=0, Zmax=open (add space). Without any ground plane.
Som why CST gives this error? Is there any mistake in the settings?
Regards

Hi:
1) i think you CPW is embedding on your slot etc so try make an boolean operation among them.
2) Cnnot comment
Regards

Hi,
Please have a look for the attachments for all cases. Could you suggest the boundary conditions for each case and anything to change in port dimensions.

Dear abuantenna,
Make sure you have a 'Normal' backgroud , i.e. Air and not PEC.
P.

I think there is alway air in the backgroun material unless redefine so PEC is out of question in the case.
Regards:D

Yes of course dears.
I'm very sure from this point. It is always normal not PEC.
I uploaded the design in https://www.edaboard.com/viewtopic.php?p=607869#607869
Have a look please and let me know if there is any suggestions.